{"id":959,"date":"2017-04-08T21:24:07","date_gmt":"2017-04-09T01:24:07","guid":{"rendered":"https:\/\/www.glaver.org\/blog\/?p=959"},"modified":"2021-02-16T23:12:54","modified_gmt":"2021-02-17T04:12:54","slug":"soviet-pdp-11-clones","status":"publish","type":"post","link":"https:\/\/www.glaver.org\/blog\/?p=959","title":{"rendered":"Soviet PDP-11 Clones"},"content":{"rendered":"<p>In addition to having a domestic computer design industry (see <a href=\"http:\/\/www.sigcis.org\/?q=node\/85\">Pioneers of Soviet Computing<\/a> [<a href=\"Pioneers_of_Soviet_Computing.pdf\">local copy<\/a>]), the Soviet Union was well-known for copying computer designs from the West. While there were many possible reasons for this, one of the most commonly given ones was the desire to run specific software, also from the West. This could be a particular application program or a whole operating system. Certainly, not having to write software in order to have a deliverable computing product was a huge benefit to the Soviets. While the scale of this cloning program was not entirely understood by the West during the Soviet era (see <a href=\"https:\/\/www.cia.gov\/library\/readingroom\/document\/0000499605\">Total Soviet Computing Power<\/a> [<a href=\"DOC_0000499605.pdf\">local copy<\/a>]) it was well known that a good deal of cloning was going on.<\/p>\n<p><center><img decoding=\"async\" src=\"russians.jpg\" alt=\"Steal the best\"><br \/>\n<small><i>Image courtesy of FSU&#8217;s <a href=\"https:\/\/micro.magnet.fsu.edu\/creatures\/scriptindex.html\">Silicon Zoo<\/a><\/i><\/small><\/center><br \/>\nDEC supposedly inscribed the phrase &#8220;VAX &#8211; When you care enough to steal the very best&#8221; on an otherwise-unused area of the die for one of their MicroVAX CPUs. The phrase in the picture reads &#8220;\u0421\u0412\u0410\u041a\u0421&#8230; \u041a\u043e\u0433\u0434\u0430 \u0432\u044b \u0437\u0430\u0431\u0430\u0442\u0438\u0442\u0435 \u0434\u043e\u0432\u043e\u043b\u044c\u043d\u043e \u0432\u043e\u0440\u043e\u0432\u0430\u0442\u044c \u043d\u0430\u0441\u0442\u043e\u044f\u0449\u0438\u0439 \u043b\u0443\u0447\u0448\u0438\u0439&#8221; which is horribly mangled Russian, but I think it got the point across.<\/p>\n<hr>\n<p>The highest-performing PDP-11 CPU DEC built was based on the DCJ11 (or <a href=\"https:\/\/en.wikipedia.org\/wiki\/DEC_J-11\">J-11<\/a>, or Jaws), microprocessor. This CPU was the basis for all subsequent DEC PDP-11 products (PDP-11\/53, \/73, \/83, \/84, \/93 and \/94) up until they sold the product line to <a href=\"https:\/\/en.wikipedia.org\/wiki\/Mentec_PDP-11\">Mentec<\/a>, who continued to use the J-11 on their M70 \/ M71 \/ M80 \/ M90 and M100 CPUs. It was not until nearly 4 years had elapsed after Mentec acquired the DEC PDP-11 line that they introduced a new design, the <a href=\"http:\/\/web.archive.org\/web\/19970725211216\/http:\/\/www.mentec.com\/PDP\/m11brochu.htm\">M11<\/a>, not based on the J-11. This was probably due to the last J-11 chips being manufactured in early 1998, as production was apparently stopped as soon as Compaq acquired DEC.<\/p>\n<p>The J-11 design was not without its <a href=\"http:\/\/simh.trailing-edge.com\/semi\/j11.html\">problems<\/a>. It was a joint manufacturing effort of DEC and Harris Semiconductor (Intersil). DEC had previously used the Harris \/ Intersil 61&#215;0 chips, which implemented the PDP-8 CPU in a microprocessor. They probably weren&#8217;t expecting the issues which plagued the J-11 project. In addition to problems with the CPU itself, there were problems with the optional floating-point accelerator chip (designed and built entirely by DEC) and the support chips needed to make the J-11 function in a system. This led to a number of costly recalls by DEC to fix (or conceal) problems. The original distinction between the various PDP-11 systems based on the J-11 was lost as parts (normally the floating-point accelerator chip) were removed and \/ or the board swapped for a slower 15MHz one in the field to get the systems working reliably. Eventually the J-11 systems became reliable enough that users could have an 18MHz CPU with working floating point. Earlier J-11 chips had speed restrictions (often 15MHz) and did not work with the floating-point chip. The planned optional Commercial Instruction Set (CIS) option was never produced, although you can see where it would have been placed on the bottom side of the CPU.<\/p>\n<p>Certainly not all of the problems were on the Harris side &#8211; I&#8217;ve successfully run a J-11 at 24MHz on a 3rd-party board. The DEC support chip set was found to be limited to a bit over 18 MHz, which is why DEC did not press Harris particularly hard to meet the 20MHz design goal (for top-binned parts). The part number DCJ11-AE (the -AE suffix indicated the revision level) was the last version produced, the &#8220;good one&#8221;. Interestingly, the individual chips on the first DCJ11-AE CPUs were revision 1 on the <a href=\"http:\/\/bitsavers.trailing-edge.com\/pdf\/dec\/pdp11\/j11\/J-11_Data_Chip_Specification_Jul82.pdf\">DC334<\/a> chip and revision 11 on the <a href=\"http:\/\/bitsavers.trailing-edge.com\/pdf\/dec\/pdp11\/j11\/J-11_Control_Chip_Specification_Jun82.pdf\">DC335<\/a>. The newest DCJ11-AE I&#8217;ve seen (with a module date code of 9820 and chip date codes of 9819) has a revision 4 DC334 chip and a revision 16 DC335 chip. That DCJ11-AE has the Harris logo stamped on the ceramic carrier as well as the individual chips, while a somewhat earlier sample with a 9711 date code has the same revision 4 and 16 chips, but without Harris markings on the ceramic carrier. 9820 is pretty close to the time DEC was acquired by Compaq, so the J-11 hung on to the bitter end, 4 years after DEC sold the rest of the PDP-11 business to Mentec. Apparently there weren&#8217;t user-visible changes which would cause the overall CPU revision to change to a DCJ11-AF. Perhaps the changes were to simplify the manufacturing process.<\/p>\n<p>DEC also &#8220;shot themselves in the foot&#8221; by having one group think the part was solely for DEC&#8217;s use in building systems, while another group was trying to get design wins in 3rd-party products. This led to a bizarre situation where if you tried to purchase a J-11 chip by itself from DEC, you got a call from the J-11 product manager (Cathy Berida) who was forced by upper management to ask you what you planned on doing with it before the order would go through. Needless to say, DEC did not get a lot of OEM design wins due to their inconsistent policies regarding the chip. The result of this is that you can purchase case lots of never-used J-11 chips on places like <a href=\"http:\/\/www.ebay.com\/itm\/111476137790\">eBay<\/a>  [<a href=\"111476137790.pdf\">local copy<\/a>] if you happen to need a few hundred of them.<\/p>\n<hr>\n<p><a href=\"dec-j11-l.jpg\"><img decoding=\"async\" src=\"dec-j11-s.jpg\" alt=\"DEC M8192\"><\/a><br \/>\n<center><small><i>Image courtesy of <a href=\"http:\/\/electrontubestore.com\/index.php?main_page=popup_image&#038;pID=2416\">ElectronTubeStore<\/a><\/i><\/small><\/center><\/p>\n<p>[This and all subsequent images in this post are clickable to show a higher-resolution version.]<\/p>\n<p>This is a DEC M8192 module, used in the PDP-11\/73 systems. It has an older J-11 CPU and no floating-point accelerator (FPA) chip (the large empty socket below the white J-11 CPU). A manual for it is available from <a href=\"http:\/\/bitsavers.trailing-edge.com\/pdf\/dec\/pdp11\/1173\/KDJ11-A_UsersManual.pdf\">Bitsavers<\/a> [<a href=\"KDJ11-A_UsersManual.pdf\">local copy<\/a>]. Note that the manual doesn&#8217;t show the socket for the FPA, and the sole mention of the FPA is in the description of the internal J-11 CPU registers.<\/p>\n<hr>\n<p><a href=\"soviet-j11-l.jpg\"><img decoding=\"async\" src=\"soviet-j11-s.jpg\" alt=\"Soviet M8\"><\/a><br \/>\n<center><small><i><a href=\"http:\/\/sovietsouvenirs.com\/catalog\/images\/ic\/info\/m8-1.jpg\">Image<\/a> courtesy of eBay user <a href=\"http:\/\/www.ebay.com\/usr\/ru.seller\">ru.seller<\/a><\/i><\/small><\/center><\/p>\n<p>This is a Soviet M8 CPU board. It looks suspiciously like the DEC M8192 board, doesn&#8217;t it? Aside from some component substitutions due to limited availability of things (like PLCC sockets for the support chips and the compact 4-LED display) it is pretty much the same board. Note that this board doesn&#8217;t even have a socket for the floating-point accelerator chip. The pads are on the board, but there is no socket. This may indicate that the clone parts were created before DEC got the various design issues ironed out. Additionally, the configuration jumpers are soldered in instead of being removable jumpers as they are on the DEC board. The board in the picture is non-functional as some components (mainly bypass capacitors) have been removed for some reason.<\/p>\n<hr>\n<p><a href=\"soviet-j11-detail-l.jpg\"><img decoding=\"async\" src=\"soviet-j11-detail-s.jpg\" alt=\"Soviet M8 detail\"><\/a><br \/>\n<center><small><i><a href=\"http:\/\/sovietsouvenirs.com\/catalog\/images\/ic\/info\/m8-1.jpg\">Image<\/a> courtesy of eBay user <a href=\"http:\/\/www.ebay.com\/usr\/ru.seller\">ru.seller<\/a><\/i><\/small><\/center><\/p>\n<p>Examining the M8 board in more detail, we can see some <i>very<\/i> interesting things. At the top center of theis image, you can see two chips with the logo &#8220;MHS&#8221; and the date code &#8220;USA8616&#8221;. If you&#8217;ve never heard of MHS, I&#8217;m not surprised. They were a relatively obscure manufacturer of specialty ICs. MHS stands for &#8220;Matra Harris Semiconductor&#8221; &#8211; yup, the same Harris Semiconductor that was making J-11 parts for DEC. They probably had no idea their parts were ending up in the Soviet Union &#8211; often, &#8220;front&#8221; companies would purchase parts in the West and those parts would eventually make their way into the Soviet Union.<\/p>\n<p>The MHS part is a <a href=\"DSAP0015924.pdf\">HM3-65747-5<\/a> CMOS 4K x 1 static RAM. The DEC M8192 board, oddly enough, does not use the MHS part. Instead, it uses a National Semiconductor <a href=\"NMC21_datasheet.pdf\">NMC2147HN-3<\/a> which appears to be a pin-compatible substitute.<\/p>\n<p>Also in this detail image, you can see 5 parts where the manufacturer and part number information has been ground off and &#8220;\u0420\u042312&#8221; written on on them with a marker pen. There is another of these parts outside the area of this detail. On the DEC M8192, these are Fairchild <a href=\"FUJMD038-2-12.pdf\">MB8168-55<\/a> NMOS 4K x 4 static RAM. &#8220;\u0420\u0423&#8221; was the Soviet type designator for a memory chip. One of the chips on the Soviet board does not have its identifying marks removed, and it appears to be an INMOS <a href=\"IMS1420M.pdf\">IMS1420D-55<\/a>, also an NMOS 4K x 4 static RAM. The mysterious \u0420\u042312 is probably \u041a132\u0420\u042312 as <a href=\"http:\/\/www.ecworld.ru\/support\/ssf\/K132.htm\">this page<\/a> and <a href=\"http:\/\/www.aes.pp.ua\/11111111.php\">this page<\/a> both show that as an interchange part for the IMS1420-55. They&#8217;re almost certainly not Soviet-made parts as there would be no need to grind off the original markings in that case.<\/p>\n<hr>\n<p><a href=\"6F5S9198-l.jpg\"><img decoding=\"async\" src=\"6F5S9198-s.jpg\" alt=\"DEC DCJ11 top\"><\/a><\/p>\n<p>This is the top of a genuine DEC DCJ11-AE. As you can see, there are two large chips mounted to a ceramic carrier. Under the top layer of ceramic you can see some of the leads that connect the two chips to each other and to the pins on the edge of the CPU. There are 4 bypass capacitors for each chip to filter out noise. There is also one SOT-package part (possibly a transistor or 3-terminal regulator) installed, with an unpopulated space for an second one. It possible that the unpopulated space was for a part intended to be used on the underside of the CPU.<\/p>\n<hr>\n<p><a href=\"6F5S9202-l.jpg\"><img decoding=\"async\" src=\"6F5S9202-s.jpg\" alt=\"DEC DCJ11 bottom\"><\/a><\/p>\n<p>The bottom view of the same part shows the pads which would have held the Commercial Instruction Set if it was ever implemented. You can also see additional leads in an intermediate ceramic layer &#8211; the ceramic carrier was a complex, multi-layer affair.<\/p>\n<hr>\n<p><a href=\"6F5S9216-l.jpg\"><img decoding=\"async\" src=\"6F5S9216-s.jpg\" alt=\"DEC DCJ11 angle\"><\/a><\/p>\n<p>This angle view shows how the individual chips were soldered to the ceramic carrier.<\/p>\n<hr>\n<p><a href=\"6F5S9223-l.jpg\"><img decoding=\"async\" src=\"6F5S9223-s.jpg\" alt=\"DEC DCJ11 edge\"><\/a><\/p>\n<p>Looking at the edge of the CPU, you can get an idea how thick the ceramic actually is on this part.<\/p>\n<hr>\n<p><a href=\"6F5S9197-l.jpg\"><img decoding=\"async\" src=\"6F5S9197-s.jpg\" alt=\"Soviet 1831 top\"><\/a><\/p>\n<p>Here is where things get interesting. This is a Soviet 1831 clone of the J-11. The logo on the chips indicates that it was made by the NPO Electronics (\u041d\u041f\u041e \u042d\u043b\u0435\u043a\u0442\u0440\u043e\u043d\u0438\u043a\u0430) factory (now <a href=\"http:\/\/corprussia.com\/company\/1260689\">VZZP<\/a>) in Voronezh. Instead of the DC334 and DC335 numbering on the DEC chips, the chips on this board are labeled \u041a\u041d1831\u0412\u041c1 and \u041a\u041d1831\u0412\u04231. <a href=\"https:\/\/en.wikipedia.org\/wiki\/Soviet_integrated_circuit_designation\">Wikipedia<\/a> has a detailed article on Soviet integrated circuit numbering, but it breaks down as follows:<\/p>\n<ul>\n<li>\u041a &#8211; Commercial \/ consumer component<\/li>\n<li>\u041d &#8211; Ceramic leadless chip carrier (the individual chips on the CPU carrier)<\/li>\n<li>1 &#8211; Monolithic integrated circuit<\/li>\n<li>8 &#8211; Microprocessor<\/li>\n<li>31 &#8211; Number in series<\/li>\n<li>\u0412\u041c &#8211; Microprocessor<\/li>\n<li>\u0412\u0423 &#8211; Microcode<\/li>\n<li>1 &#8211; Variant<\/li>\n<\/ul>\n<p>Apparently the two chips had their own code names &#8211; \u0422\u0443\u043d\u0433\u0443\u0441 1 (Tungus 1) for the \u041a\u041d1831\u0412\u04231 and \u0422\u0435\u043e\u0440\u0435\u043c\u0430 2 (Theorem 2) for the \u041a\u041d1831\u0412\u041c1.<\/p>\n<p>You can see the somewhat different method of attaching the pins to the carrier, compared to the DEC CPU. This is due to the thinner carrier as I will discuss below. The same four bypass capacitors are present, but the SOT-package part found on the J-11 is not, although the pads are there. The chips appear to have been hand-soldered onto the carrier. While the carrier in this picture is blue, variants with white and greenish carriers have been photographed. While this part is just labeled M-2-1, other newer samples have been labeled \u041c8\u041a \u0440\u0435\u04344 (M8K red4).<\/p>\n<hr>\n<p><a href=\"6F5S9201-l.jpg\"><img decoding=\"async\" src=\"6F5S9201-s.jpg\" alt=\"Soviet 1831 bottom\"><\/a><\/p>\n<p>The bottom of the 1831 shows a much simpler method of construction, compared with the DEC J-11. No additional leads are visible and the only marking is &#8220;0133&#8221;. It is not known what this means &#8211; as the chips on the carrier have 8905 and 8904 date codes, it doesn&#8217;t make sense that the CPU would have remained unassembled for twelve years. Perhaps it was the date it was installed into or removed from a system?<\/p>\n<hr>\n<p><a href=\"6F5S9214-l.jpg\"><img decoding=\"async\" src=\"6F5S9214-s.jpg\" alt=\"Soviet 1831 angle\"><\/a><\/p>\n<p>This angle view clearly shows the hand-soldering of the chips to the carrier.<\/p>\n<hr>\n<p><a href=\"6F5S9226-l.jpg\"><img decoding=\"async\" src=\"6F5S9226-s.jpg\" alt=\"Soviet 1831 edge\"><\/a><\/p>\n<p>The edge view shows how much thinner the carrier is compared to the DEC J-11.<\/p>\n<hr>\n<p><a href=\"6F5S9218-l.jpg\"><img decoding=\"async\" src=\"6F5S9218-s.jpg\" alt=\"Soviet 1831 chip top\"><\/a><\/p>\n<p>This detail shows the top of an unmounted \u041a\u041d1831\u0412\u04231 chip. It is interesting that while the fabrication method was quite different from the DEC version, they apparently went through a lot of effort to match the packaging exactly. Perhaps they were trying to substitute the \u041a\u041d1831\u0412\u04231 and \u041a\u041d1831\u0412\u041c1 chips one at a time onto a DEC package during development? That would not explain why this unusual packaging continued into production, though.<\/p>\n<hr>\n<p><a href=\"6F5S9220-l.jpg\"><img decoding=\"async\" src=\"6F5S9220-s.jpg\" alt=\"Soviet 1831 chip bottom\"><\/a><\/p>\n<p>The bottom of the unmounted \u041a\u041d1831\u0412\u04231 is pretty boring, having only a stamped &#8220;35&#8221;. This does not match the date code on the top of the chip, 9111, so perhaps it is an inspection mark.<\/p>\n<hr>\n<p><a href=\"6F5S9194-l.jpg\"><img decoding=\"async\" src=\"6F5S9194-s.jpg\" alt=\"Soviet 1811 top\"><\/a><\/p>\n<p>This is an 1811 (DEC F-11, PDP-11\/23 and \/24) clone CPU. Unlike the 1831, this assembly is not a drop-in equivalent to any DEC F-11. It contains \u041a\u041d1811\u0412\u041c1, \u041a\u041d1811\u0412\u04231, \u041a\u041d1811\u0412\u04232 and \u041a\u041d1811\u0412\u04233 chips. That would be a processor and 3 microcode ROMs. This is equivalent to a DEC F-11 and a DEC KEF11-AA FPU (Floating Point Unit). Oddly, in the DEC implementation the KTF11-AA MMU (Memory Management Unit) is necessary for using the KEF11-AA as the FPU reuses some of the registers in the MMU. This chip is marked \u041c\u041a1 \u0440\u0435\u04341 (MK1 red1). The logos on the chips show that they were fabricated by NPO Electronics, same as the J-11 clone. <\/p>\n<hr>\n<p><a href=\"6F5S9206-l.jpg\"><img decoding=\"async\" src=\"6F5S9206-s.jpg\" alt=\"Soviet 1811 bottom\"><\/a><\/p>\n<p>The bottom shows that the CPU is made with a brown ceramic instead of the white ceramic (with blue top coating) used on the 1831. The bottom is marked 8821, which corresponds roughly to the date codes on the individual chips (8808 through 8811). Too faint to be seen clearly is the writing &#8220;26-027&#8221; across the top of the chip as shown in this picture).<\/p>\n<hr>\n<p><a href=\"6F5S9211-l.jpg\"><img decoding=\"async\" src=\"6F5S9211-s.jpg\" alt=\"Soviet 1811 angle\"><\/a><\/p>\n<p>An angle view, clearly showing the &#8220;MK1 red1&#8221; marking.<\/p>\n<hr>\n<p><a href=\"6F5S9229-l.jpg\"><img decoding=\"async\" src=\"6F5S9229-s.jpg\" alt=\"Soviet 1811 edge\"><\/a><\/p>\n<p>Here you can see that the carrier is also quite thin, similar to the 1831.<\/p>\n<hr>\n<p><a href=\"e8902-7-l.jpg\"><img decoding=\"async\" src=\"e8902-7-s.jpg\" alt=\"Elektronika 89 board\"><\/a><br \/>\n<center><small><i>Image courtesy of <a href=\"http:\/\/www.leningrad.su\/museum\/show_calc.php?n=571\">Soviet Digital Electronics Museum &#8211; Sergei Frolov<\/a><\/i><\/small><\/center><\/p>\n<p>This is the CPU board from the Elektronika 89 minicomputer. You can see the 1811 CPU, along with the \u041a\u04201811\u0412\u04221 MMU chip, in the center of the board.<\/p>\n<hr>\n<p>I hope you&#8217;ve enjoyed this look at a relatively unexplored (in the West) area of computer history. These parts occasionally show up on eBay where they often sell for inflated prices. Not all of the eBay listings have the parts described correctly, so rely on pictures (as long as they&#8217;re not &#8220;sample image only&#8221;) to see what you&#8217;re getting.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>In addition to having a domestic computer design industry (see Pioneers of Soviet Computing [local copy]), the Soviet Union was well-known for copying computer designs from the West. While there were many possible reasons for this, one of the most commonly given ones was the desire to run specific software, also from the West. This [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":[],"categories":[13],"tags":[],"_links":{"self":[{"href":"https:\/\/www.glaver.org\/blog\/index.php?rest_route=\/wp\/v2\/posts\/959"}],"collection":[{"href":"https:\/\/www.glaver.org\/blog\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.glaver.org\/blog\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.glaver.org\/blog\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.glaver.org\/blog\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=959"}],"version-history":[{"count":55,"href":"https:\/\/www.glaver.org\/blog\/index.php?rest_route=\/wp\/v2\/posts\/959\/revisions"}],"predecessor-version":[{"id":1212,"href":"https:\/\/www.glaver.org\/blog\/index.php?rest_route=\/wp\/v2\/posts\/959\/revisions\/1212"}],"wp:attachment":[{"href":"https:\/\/www.glaver.org\/blog\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=959"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.glaver.org\/blog\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=959"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.glaver.org\/blog\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=959"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}